2023年11月29日发(作者：q6600cpu参数配置)

ESD5311Z

ESD5311Z

1-Line, Bi-directional, Ultra-low Capacitance

Transient Voltage Suppressor

DFN0603-2L (Bottom View)

Pin1

1306.

35.

409.

64

34537

5 0 1 5 8

Descriptions

The ESD5311Z is an ultra-low capacitance TVS (Transient

Voltage Suppressor) designed to protect high speed data

interfaces. It has been specifically designed to protect

sensitive electronic components which are connected to data

and transmission lines from over-stress caused by ESD

(Electrostatic Discharge).

The ESD5311Z incorporates one pair of ultra-low

capacitance steering diodes plus a TVS diode.

The ESD5311Z may be used to provide ESD protection up to

±20kV (contact discharge) according to IEC61000-4-2, and

withstand peak pulse current up to 4A (8/20μs) according to

IEC61000-4-5.

The ESD5311Z is available in DFN0603-2L package.

Standard products are Pb-free and Halogen-free.

Pin configuration

Pin2

Features

 Stand-off voltage: 5V Max.

 Transient protection for each line according to

IEC61000-4-2 (ESD): ±20kV (contact discharge)

IEC61000-4-4 (EFT): 40A (5/50ns)

IEC61000-4-5 (surge): 4 A (8/20μs) D = Device code

 Ultra-low capacitance: C

 Ultra-low leakage current: I

 Low clamping voltage: V

 Small package

J

= 0.25pF typ. * = Month code

R

< 1nA typ.

Pin1Pin2

*

D

CL PP

= 21V typ. @ I= 16A (TLP)

Marking (Top View)

Applications Order information

 USB 2.0 and USB 3.0

 HDMI 1.3 and HDMI 1.4

 SATA and eSATA

 DVI

 IEEE 1394

 PCI Express

 Portable Electronics

 Notebooks

Device Package Shipping

ESD5311Z-2/TR DFN0603-2L 10000/Tape&Reel

Will Semiconductor Ltd. 1 Revision 1.4, 2018/04/23

ESD5311Z

Absolute maximum ratings

Parameter Symbol Rating Unit

Peak pulse power (t = 8/20μs) P 84 W

ppk

Peak pulse current (t = 8/20μs) I 4 A

pPP

ESD according to IEC61000-4-2 air discharge ±20

ESD according to IEC61000-4-2 contact discharge ±20

Junction temperature T 125 C

Operating temperature T -40~85 C

Lead temperature T 260 C

Storage temperature T -55~150 C

V kV

ESD

J

OP

L

STG

o

o

o

o

Electrical characteristics

(T=25C, unless otherwise noted)

A

o

Parameter Symbol Condition Min. Typ. Max. Unit

Reverse maximum working voltage V 5.0 V

Reverse leakage current I <1 100 nA V = 5V

Reverse breakdown voltage V 7.5 9.0 10.0 V I = 1mA

Clamping voltage V 21 V I = 16A, t = 100ns

Dynamic resistance R 0.7 Ω

Clamping voltage V 21 V V = 8kV

Clamping voltage V

Junction capacitance C 0.25 0.4 pF V = 0V, f = 1MHz

Notes:

1) TLP parameter: Z = 50Ω, t = 100ns, t = 2ns, averaging window from 60ns to 80ns. R is calculated from 4A to

0prDYN

16A.

2) Contact discharge mode, according to IEC61000-4-2.

3) Non-repetitive current pulse, according to IEC61000-4-5.

3)

2)

1)

1)

RWM

RRWM

BRT

CLPPp

DYN

CLESD

CL

JR

14 V I = 1A, t = 8/20μs

21 V I = 4A, t = 8/20μs

PPp

PPp

Will Semiconductor Ltd. 2 Revision 1.4, 2018/04/23

ESD5311Z

Typical characteristics

(T=25C, unless otherwise noted)

A

o

Front time: T= 1.25 T = 8s

1



Time to half-value: = 20s

T

2



P

e

a

k

p

u

l

s

e

c

u

r

r

e

n

t

(

%

)

50

10

0

0

T

2

C

u

r

r

e

n

t

(

%

)

100

90

100

90

T

T

1

20

Time (s)



10

30ns

t = 0.7~1ns

r

60ns

t

Time (ns)

8/20μs waveform per IEC61000-4-5

V

C

-

C

l

a

m

p

i

n

g

v

o

l

t

a

g

e

(

V

)

Contact discharge current waveform per IEC61000-4-2

Pulse waveform: t = 8/20s

p



16

C

J

-

J

u

n

c

t

i

o

n

c

a

p

a

c

i

t

a

n

c

e

(

p

F

)

18

0.28

0.26

12

ESD5311Z

ESD clamping ESD clamping

(+8kV contact discharge per IEC61000-4-2) (-8kV contact discharge per IEC61000-4-2)

20

16

12

T

L

P

c

u

r

r

e

n

t

(

A

)

Z = 50

0



t = 2ns

r

t = 100ns

p

8

4

0

-4

-8

-12

-16

-20

-25-20-15-10-50510152025

TLP voltage (V)

TLP Measurement

Will Semiconductor Ltd. 4 Revision 1.4, 2018/04/23

ESD5311Z

PACKAGE OUTLINE DIMENSIONS

DFN0603-2L

CATHODE MARKING

b

E

L

D

e

TOP VIEW

BOTTOM VIEW

A

A3

A1

SIDE VIEW

Dimensions in Millimeters

Symbol

Min. Typ. Max.

A 0.23 0.30 0.34

A1 0.00 0.03 0.05

A3 0.10 Ref.

D 0.55 0.60 0.67

E 0.25 0.30 0.37

b 0.10 0.15 0.20

L 0.20 0.24 0.30

e 0.40 Ref

Recommended PCB Layout (Unit: mm)

0.200.22

0

.

3

2

Notes:

0.42

0.64

This recommended land pattern is for reference

purposes only. Please consult your manufacturing

group to ensure your PCB design guidelines are met.

Will Semiconductor Ltd. 5 Revision 1.4, 2018/04/23

ESD5311Z

TAPE AND REEL INFORMATION

Reel Dimensions

Tape Dimensions

R

D

P1

W

Quadrant Assignments For PIN1 Orientation In Tape

Q1Q2

Q1Q2

User Direction of Feed

Q3

Q4Q4

Q3

RD Reel Dimension

W Overall width of the carrier tape

P1 Pitch between successive cavity centers

7inch13inch

1

8mm

12mm

16mm

2mm4mm8mm

Q1Q2Q3Q4

Pin1 Pin1 Quadrant

Will Semiconductor Ltd. 6 Revision 1.4, 2018/04/23