2023年6月26日发(作者：)

5812中⽂资料FEATURESI High-Speed Source Drivers I 60 V Source Outputs I To 3.3 MHz Data Input Rate I Low Output-Saturation Voltages ILow-Power CMOS Logic and Latches BiMOS II 20-BIT SERIAL-INPUT, LATCHEDSOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNSThe UCN5812AF/EPF combine a 20-bit CMOS shift register, data latches, and control circuitry with high-voltage bipolarsource drivers and active DMOS pull-downs for reduced supply current requirements. Although designed primarily forvacuum-fluorescent displays, the high-voltage, high-current outputs also allow them to be used in other peripheral powerdriver applications. They are improved versions of the original UCN5812A/ CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 5 V supply, they willoperate to at least 3.3 MHz. At 12 V, higher speeds are possible. Especially useful for inter-digit blanking, the BLANKINGinput disables the output source drives and turns on the DMOS sink drivers. Use with TTL may require the use of appropriatepull-up resistors to ensure an input logic high.A CMOS serial data output enables cascade connections in applications requiring additional drive lines. Similar devices areavailable as theUCN5810AF/LWF (10 bits), UCN5811A (12 bits), and UCN5818AF/EPF (32 bits).The output source drivers are high-voltage pnp-npn Darlingtons with a minimum breakdown of 60 V and are capable ofsourcing up to 40 mA. The DMOS active pull-downs are capable of sinking up to 15 UCN5812AF is supplied in a 28-pin dual in-line plastic package with 0.600" (15.24 mm) row spacing. For surfacemounting, the UCN5812EPF is furnished in 28-lead plastic chip carrier (quad pack) with 0.050"(1.22 mm)centers. Copperlead-frames, reduced supply current requirements and lower output saturation voltages, allow continuous operation, with alloutputs sourcing 25 mA, of the UCN5812AF over the operating temperature range,and the UCN5812EPF up to +75°C. Alldevices are also available for opera-tion between -40°C and +85°C. To order, change the prefix from ‘UCN’ to ‘UCQ’.Always order by complete part number, e.g.,UCN5812AF .Data Sheet26182.26BI Active DMOS Pull-Downs I Reduced Supply Current Requirements I Improved Replacement for TL58125812-F5812-F20-BIT SERIAL-INPUT,LATCHED SOURCE DRIVERSWITH ACTIVE-DMOS PULL-DOWNS115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-5000UCN5812AFTYPICAL OUTPUT DRIVERTYPICAL INPUT CIRCUITDwg. No. A-14,219NBIPOLARSERIAL-PARALLEL SHIFT REGISTERLATCHESLOAD SUPPLY OUT 2OUT 7OUT 8Dwg. PP-029-7OUT 19OUT 18OUT 13SERIAL DATA OUTBLANKING LOGIC SUPPLY STROBE GROUNDCLOCKOUT 9OUT 10OUT 12OUT 11SERIAL DATA IN OUT 6OUT 1OUT 4OUT 3OUT 20OUT 5OUT 17OUT 16OUT 15OUT14Dwg. EP-010-5INCopyright ? 1988, 2000 Allegro MicroSystems, Inc.5812-F20-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS/doc/ Limits @ V DD = 5 V Limits @ V DD = 12 VCharacteristic Symbol Test Conditions Output Leakage Current I CEX V OUT = 0 V, T A =+70°C—-5.0-15—-5.0-15µA Output Voltage V OUT(1)I OUT = -25 mA, V BB = 60 V5858.5—5858.5—VV OUT(0)I OUT = 1 mA— 2.0 3.0———VI OUT = 2 mA———— 2.0 3.5V Output Pull-Down Current I OUT(0)V OUT = 5 V to V BB 2.0 3.5————mAV OUT = 20 V to V BB———8.013—mA Input Voltage V IN(1) 3.5— 5.310.5—12.3VV IN(0)-0.3—+0.8-0.3—+0.8V Input Current I IN(1)V IN = V DD—0.050.5—0.1 1.0µAI IN(0)V IN = 0.8 V—-0.05-0.5—-0.1-1.0µA Serial Data V OUT(1)I OUT = -200 µA 4.5 4.7—11.711.8—VV OUT(0)I OUT = 200 µA—200250—100200mV Maximum Clock Frequency f clk 3.3*—————MHz Supply Current IDD(1)All Outputs High—100300—200500µAI DD(0)All Outputs Low—100300—200500µAI BB(1)Outputs High, No Load— 1.5 4.0— 1.5 4.0mAI BB(0)Outputs Low—10100—10100µA Blanking to Output Delay t PHL C L = 30 pF, 50% to 50%—2000——1000—nst PLH C L = 30 pF, 50% to 50%—1000——850—ns Output Fall Time t f C L = 30 pF, 90% to 10%—1450——650—ns OutputRise Time t r C L = 30 pF, 10% to 90%—650——700—nsNegative current is defined as coming out of (sourcing) the specified device pin.* Operation at a clock frequency greater than the specified minimum value is possible but not ICAL CHARACTERISTICS at T A = +25°C, V BB = 60 V (unless otherwise noted).5812-F20-BIT SERIAL-INPUT,LATCHED SOURCE DRIVERSWITH ACTIVE-DMOS PULL-DOWNS115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-5000TRUTH TABLEL = Low Logic LevelH = High Logic Level X = IrrelevantP = Present State R = Previous StateDwg. No. 12,649ASerial Data present at the input is transferred to the shift register on the logic “0” to logic “1”transition of the CLOCK inputpulse. On succeed-ing CLOCK pulses, the registers shift datainformation towards the SERIAL DATA OUT-PUT. The SERIAL DATA must appear at the input prior to the rising edge of theCLOCK input ation present at any register is trans-ferred to the respective latch when the STROBE is high (serial-to-parallelconversion). The latches will continue to acceptnew data as long as the STROBE is held ations where the latches are bypassed (STROBE tied high) will requirethat the BLANKING input be high during serial data the BLANKING input is high, the output source drivers are disabled (OFF); the DMOS sink drivers are ON, theinformation stored in the latches is not affected by theBLANKING input. With the BLANKING input low, the outputs are controlled by the state of their respective DATA IN STROBE BLANKINGOUT TIMING REQUIREMENTS(T A = +25°C,V DD = 5 V, Logic Levels are V DD and Ground)m Data Active Time Before Clock Pulse(Data Set-Up Time). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 ns m Data Active Time After Clock Pulse(Data Hold Time). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 ns m Data Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 150 ns m Clock Pulse Width. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 ns m Time Between ClockActivation and Strobe. . . . . . . . . . . 300 ns m Strobe Pulse Width. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ns lTime Between Strobe Activation andOutput Transistion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 ns Timing is representative of a 3.3 MHz clock. Higherspeeds may be attainable with increased supply voltage; operation at high temperatures will reduce the specified maximumclock frequency.5812-F20-BIT SERIAL-INPUT,LATCHED SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS/doc/N5812AFDimensions in Inches (controlling dimensions)NOTES: body and lead configuration at vendor ’s option within limits spacing tolerance is thickness is measured at seating plane or ed in standard sticks/tubes of 12 ions in Millimeters (for reference only)123Dwg. MA-003-28 mm144123Dwg. MA-003-28 in1445812-F20-BIT SERIAL-INPUT,LATCHED SOURCE DRIVERSWITH ACTIVE-DMOS PULL-DOWNS115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-5000UCN5812EPFDimensions in Inches (controlling dimensions)NOTES: body and lead configuration at vendor ’s option within limits spacing tolerance is ed in standard sticks/tubes of 38 devices or add “TR ” to part number for tape and . MA-005-28A mm5Dwg. MA-005-28A inDimensions in Millimeters (for reference only)5812-F20-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS/doc/e products described here are manufactured under one or more U.S. patents or U.S. patents o MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as maybe required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing anorder, the user is cautioned to verify that the information being relied upon is o products are not authorized for use as critical components in life-support devices or systems without express information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes noresponsi-bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.5812-F20-BIT SERIAL-INPUT,LATCHED SOURCE DRIVERSWITH ACTIVE-DMOS PULL-DOWNS115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-5000POWERINTERFACE DRIVERSFunctionOutput Ratings*Part Number ?SERIAL-INPUT LATCHED DRIVERS8-Bit (saturated drivers)-120 mA 50 V?58958-Bit 350 mA 50 V 58218-Bit 350 mA 80 V 58228-Bit 350 mA 50 V?58418-Bit350 mA 80 V?58428-Bit (constant-current LED driver)75 mA 17 V 62758-Bit (DMOS drivers)250 mA 50 V 65958-Bit (DMOSdrivers)350 mA 50 V?6A5958-Bit (DMOS drivers)100 mA 50 V 6B59510-Bit (active pull-downs)-25 mA 60 V 5810-F and 6809/1012-Bit (active pull-downs)-25 mA 60 V 5811 and 681116-Bit (constant-current LED driver)75 mA 17 V 627620-Bit (active pull-downs)-25 mA 60 V 5812-F and 681232-Bit (active pull-downs)-25 mA 60 V 5818-F and 681832-Bit100 mA 30 V 583332-Bit (saturated drivers)100 mA 40 V 5832PARALLEL-INPUT LATCHED DRIVERS4-Bit350 mA 50 V?58008-Bit -25 mA 60 V 58158-Bit350 mA 50 V?58018-Bit (DMOS drivers)100 mA 50 V 6B2738-Bit (DMOS drivers)250 mA 50 V 6273SPECIAL-PURPOSE DEVICESUnipolar Stepper Motor Translator/Driver 1.25 A 50 V?5804Addressable 8-Bit Decoder/DMOS Driver 250 mA 50 V6259Addressable 8-Bit Decoder/DMOS Driver 350 mA 50 V?6A259Addressable 8-Bit Decoder/DMOS Driver 100 mA 50 V6B259Addressable 28-Line Decoder/Driver 450 mA30 V6817*Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining ve current is defined as coming out of (sourcing) the te part number includes additional characters to indicate operating temperature range and package al transient-suppression diodes included for inductive-load protection.