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DM74LS00 Quad 2-Input NAND Gate
August 1986
Revised March 2000
DM74LS00
Quad 2-Input NAND Gate
General Description
This device contains four independent gates each of which
performs the logic NAND function.
Ordering Code:
Order Number
DM74LS00M
DM74LS00SJ
DM74LS00N
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection DiagramFunction Table
Y = AB
Inputs
A
L
L
H
H
H = HIGH Logic Level
L = LOW Logic Level
Output
B
L
H
L
H
Y
H
H
H
L
© 2000 Fairchild Semiconductor
D
M
7
4
L
S
0
0
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to +70°C
−65°C to +150°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature0
ParameterMin
4.75
2
0.8
−0.4
8
70
Nom
5
Max
5.25
Units
V
V
V
mA
mA
°C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CCH
I
CCL
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current with Outputs HIGH
Supply Current with Outputs LOW
Conditions
V
CC
= Min, I
I
= −18 mA
V
CC
= Min, I
OH
= Max,
V
IL
= Max
V
IH
= Min
I
OL
= 4 mA, V
CC
= Min
V
CC
= Max, V
I
= 7V
V
CC
= Max, V
I
= 2.7V
V
CC
= Max, V
I
= 0.4V
V
CC
= Max (Note 3)
V
CC
= Max
V
CC
= Max
−20
0.8
2.4
2.73.4
0.35
0.25
0.5
0.4
0.1
20
−0.36
−100
1.6
4.4
mA
µA
mA
mA
mA
mA
Min
Typ
(Note 2)
Max
−1.5
Units
V
V
LOW Level V
CC
= Min, I
OL
= Max,
V
Note 2: All typicals are at V
CC
= 5V, T
A
= 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
at V
CC
=
5V and T
A
= 25°C
R
L
= 2 kΩ
Symbol
t
PLH
t
PHL
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Parameter
C
L
= 15 pF
Min
3
3
Max
10
10
C
L
= 50 pF
Min
4
4
Max
15
15
ns
ns
Units
2
DM74LS00
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
D
M
7
4
L
S
0
0
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
4
DM74LS00 Quad 2-Input NAND Gate
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2.A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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