2024年2月18日发(作者：魅族mx4pro)

U-97APPLICATION NOTEMODELLING, ANALYSIS ANDCOMPENSATION OF THECURRENT-MODE CONVERTERAbstractAs current-mode conversion increases in popularity, several peculiarities associated with fixed-frequency, peak-currentdetecting schemes have surfaced These include instability above 50% duty cycle, a tendency towards subharmonicoscillation, non-ideal loop response, and an increased sensitivity to noise. This paper will attempt to show that theperformance of any current-mode converter can be improved and at the same time all of the above problems reduced oreliminated by adding a fixed amount of “slope compensation” to the sensed current waveform.1.0 INTRODUCTIONThe recent introduction of integrated control circuits designed specificallyfor current mode control has led to a dramatic upswing in theapplication of this technique to new designs. Although the advantages ofcurrent-mode control over conventional voltage-mode control has beenamply demonstrated(l-5), there still exist several drawbacks to a fixedfrequency peak-sensing current mode converter. They are (1) open loopinstability above 50% duty cycle, (2) less than ideal loop responsecaused by peak instead of average inductor current sensing, (3) tendencytowards subharmonic oscillation, and (4) noise sensitivity, particularlywhen inductor ripple current is small. Although the benefits of currentmode control will, in most cases, far out-weight these drawbacks, asimple solution does appear to be available. It has been shown by anumber of authors that adding slope compensation to the currentwaveform (Figure 1) will stabilize a system above 50% duty cycle. Ifone is to look further, it becomes apparent that this same compensationtechnique can be used to minimize many of the drawbacks stated fact, it will be shown that any practical converter will nearly alwaysperform better with some slope compensation added to the simplicity of adding slope compensation - usually a single resistor -adds to its attractiveness. However, this introduces a new problem - thatof analyzing and predicting converter performance. Small signal ACmodels for both current and voltage-mode PWM’s have beenextensively developed in the literature. However, the slope compensatedor “dual control” converter possesses properties of both with anequivalent circuit different from yet containing elements of gh this has been addressed in part by several authors(l,2), therestill exists a need for a simple circuit model that can provide bothqualitative and quantitative results for the power supply 1- A CURRENT-MODE CONTROLLED BUCK REGULATOR WITH SLOPE COMPENSATION.3-43

APPLICATION NOTEThe first objective of this paper is to familiarize the reader with thepeculiarities of a peak-current control converter and at the same timedemonstrate the ability of slope compensation to reduce or eliminatemany problem areas. This is done in section 2. Second, in section 3, acircuit model for a slope compensated buck converter in continuousconduction will be developed using the state-space averaging techniqueoutlined in (1). This will provide the analytical basis for section 4 wherethe practical implementation of slope compensation is discussed.2.1 OPEN LOOP INSTABILITYAn unconditional instability of the inner current loop exists for any fixedfrequency current-mode converter operating above 50% duty cycle -regardless of the state of the voltage feedback loop. While sometopologies (most notably two transistor forward converters) cannotoperate above 50% duty cycle, many others would suffer serious inputlimitations if greater duty cycle could not be achieved. By injecting asmall amount of slope compensation into the inner loop, stability willresult for all values of duty cycle. Following is a brief review of thistechnique.A.) DUTY CYCLE < 0.5B.) DUTY CYCLE > 0.5COMPENSATINGSLOPEC.) DUTY CYCLE > 0.5 WITH SLOPE COMPENSATIONFIGURE 2- DEMONSTRATION OF OPEN LOOP INSTABILITY IN ACURRENT-MODE 2 depicts the inductor current waveform,

V,. By perturbing thecurrent

AI, it may be seen graphically that

U-97m -‘/zm2(3)Therefore, to guarantee current loop stability, the slope of thecompensation ramp must be greater than one-half of the down slope ofthe current waveform. For the buck regulator of Figure 1,

constant equal to

voRs, therefore, the amplitude A of the compensatingwaveform should be chosen such thatA>TRs

I, vs nT for all n as in Figure 3, we observe a dampedsinusoidal response at one-half the switching frequency, similar to that ofan RLC circuit. This ring-out is undesirable in that it (a) produces aringing response of the inductor current to line and load transients, and(b) peaks the control loop gain at ½ the switching frequency, producinga marked tendency towards 3- ANALOGY OF THE INDUCTOR CURRENT RESPONSE TOTHAT OF AN RLC has been shown in (1), and is easily verified from equation 2, that bychoosing the slope compensation m to be equal to

APPLICATION NOTE2.3 SUBHARMONIC OSCILLATIONGain peaking by the inner current loop can be one of the mostsignificant problems associated with current-mode controllers. Thispeaking occurs at one-half the switching frequency, and - because ofloop to break into oscillation at one-half the switching frequency. Thisinstability, sometimes called subharmonic oscillation, is easily detectedas duty cycle asymmetry between consecutive drive pulses in the powerin subharmonic oscillation (dotted waveforms with period 2T).For steady state condition we can writeU-97T=(l -D)mzTorD=rm2By using (9) to reduce (7), we obtain(8)cv,=1 -2D(l

(10)write the small signal gain at f =

iL-=-2D(l

fs is4TALoop gain =c(12)1 -2D(l

fs to guarantee stability asAAVe,to an output current,writtenFrom figure 5, two equations may beADmlT-hDm2TADmrT+ADmzT(4)(5)1

r-6

+m/mz)Adding slope compensation as in figure 6 gives another equationAVc+2ADmTUsing (5) to eliminate AVc from (6) and solving for(7)(6)yieldsMfs, then for the case of m = 0 (nocompensation) we see the same instability previously discussed at 50%duty cycle. As the compensation is increased to m =

‘/2

FIGURE 6- ADDITION OF SLOPE COMPENSATION TO THE CONTROLSIGNAL

APPLICATION NOTEsystem, the finite value of

m, we reach a point, m = -m2, where themaximum. gain becomes independent of duty cycle. This is the point ofcritical damping as discussed earlier, and increasing m above this valuewill do little to improve stability for a regulator operating over the fullduty cycle range.2.4 PEAK CURRENT SENSING VERSUSAVERAGE CURRENT SENSINGTrue current-mode conversion, by definition, should force the averageinductor current to follow an error voltage - in effect replacing theinductor with a current source and reducing the order of the system byone. As shown in Figure 8, however, peak current detecting schemes aregenerally used which allow the average inductor current to vary withduty cycle while producing less than perfect input to output - orfeedforward characteristics. If we choose to add slope compensationequal to m = -½

U-97

APPLICATION NOTE(A)(B)FIGURE 11- BASIC BUCK CONVERTER (A) AND ITS SMALL SIGNALEQUIVALENT CIRCUIT MODEL (B).If we now perturb these equations - that in substituteAV1, AVo, D + IL +

V,, toduty cycle may be written from Figure 6 as(18)Perturbing this equation as before gives(19)By using 19 to eliminate

AD from 16 and 17 we arrive at the statespace equations(20)(21)An equivalent circuit model for these equations is shown in Figure 11Band discussed in the next section.3.2 A.C. MODEL DISCUSSIONThe model of Figure 11B can be used to verify and expand upon ourprevious observations. Key to understanding this model is the interactionU-97between

Rx and C can be ignoredIf

Rx is small compared to Lthen a double pole response will be formed by the LRC output filtersimilar to any voltage-mode converter. By appropriately adjusting m,any condition between these two extremes can be particular interest is the case when =TVo Since the downslope of the inductor current

-L/zm2. At this point,

(AVolAV1) at 120Hz versus slope compensation for atypical 12 volt buck regulator operating under the following conditions:

APPLICATION NOTEIf a small ripple to D.C. current ratio is used. as is the case for RL =1 ohm in the example, proportionally larger values of slope compensationmay be injected while still maintaining a high ripple rejection ratio. Inother words, to obtain a given ripple rejection ratio, the allowable slopecompensation varies proportionally to the average D.C. current, not theripple current. This is an important concept when attempting tominimize noise jitter on a low ripple 13 shows the small signal loop response (AVu/AVe) versusfrequency for the same example of Figure 12. The gains have all beennormalized to zero dB at low frequency to reflect the actual difference infrequency response as slope compensation m is varied. At m =

-% m2, *an ideal single-pole roll-off at 6dB/octave is obtained. As higher ratiosare used. the response approaches that of a double-pole with a12dB/octave roll-off and associated 180° phase shiftU-97UC1846(a) SUMMING OF SLOPE COMPENSATION DIRECTLY WITH SENSED CURRENTSIGNALUC1846(b)SUMMING OF SLOPE COMPENSATION WITH ERROR SIGNALFREQUENCY (HERTZ)FIGURE 13 - NORMALIZED LOOP GAIN V.S. FREQUENCY FOR VARIOUSSLOPE COMPENSATION RATIO’S.(c) EMITTER FOLLOWER USED TO LOWER OUTPUT IMPEDANCE 14 - ALTERNATIVE METHODS OF IMPLEMENTING SLOPE COMPEN-SATION WITH THE UC1846 CURRENT-MODE NCES4.0 SLOPE COMPENSATING THE UC1846 CONTROL enting a practical, cost effective current-mode converter hasrecently been simplified with the introduction of the UC1846 integratedcontrol chip. This I.C. contains all of the control and support circuitryrequired for the design of a fixed frequency current-mode s 14A and B demonstrate two alternative methods of implementingslope compensation using the UC1846. Direct summing of thecompensation and current sense signal at Pin 4 is easily accomplished,however, this introduces an error in the current limit sense circuitry. Thealternative method is to introduce the compensation into the negativeinput terminal of the error amplifier. This will only work if (a) the gainof the error amplifier is fixed and constant at the switching frequency(Rl/R2 for this case) and (b) both error amplifier and current amplifiergains are taken into consideration when calculating the required slopecompensation. In either case, once the value of

R2 has been calculated,the loading effect on CT can be determined and, if necessary, a bufferstage added as in Figure 14C.(1) Shi-Ping Hsu, A. Brown, L. Rensink, R. Middlebrook “Modellingand Analysis of Switching DC-to-DC Converters in Constant-Frequency Current-Programmed Mode,” PESC '79 Record (IEEEPublication 79CH1461-3 AES), pp. 284-301.(2) E. Pivit, J. Saxarra, “On Dual Control Pulse Width Modulators forStable Operation of Switched Mode Power Supplies”, Wiss. -Telefunken 52 (1979) 5, pp. 243-249.(3) R. Redl, I. Novak “Instabilities in Current-Mode ControlledSwitching Voltage Regulators,” PESC '81 Record (IEEE Publication81CH1652-7 AES), pp. 17-28.(4) W. Bums, A. Ohri, “Improving Off-Line Converter Performancewith Current-Mode Control,” Powercon 10 Proceedings, Paper B-2,1983.(5) B. Holland,

“A

New Integrated Circuit for Current-Mode Control,”Powercon 10 Proceedings, Paper C-2, DE CORPORATION7 CONTINENTAL BLVD.

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